The present invention relates to a semiconductor memory device with an error correction function.
In recent years, in the field of semiconductor memory devices, the circuits have been miniaturized, and the frequency of errors such as soft errors has increased accordingly. In view of this, semiconductor memory devices with an error correction function have been developed in the art.
Japanese Laid-Open Patent Publication No. 62-1198 discloses a semiconductor memory device with an error correction function. This publication states that testing a semiconductor memory device requires that it be possible to independently test memory cells and a circuit for error correction.
The publication discloses the following procedure of testing an encoder circuit and a decoder circuit for error correction in a semiconductor memory device. The process writes from outside data containing a bit error to a memory cell array, and also writes test bits capable of correcting the data to the memory cell array. Then, the data is read out from the memory cell array, with the decoder circuit activated, to examine whether the error has been corrected.
The encoder circuit can be tested as follows. Data produced by the encoder circuit is written to the memory cell array. Then, the written data is read out directly to the outside to examine whether the encoder circuit is operating as intended.
Thus, in order to test a circuit for error correction, it was necessary to first write data to memory cells and then read out the written data. Even if there is a defective memory cell in a memory cell array, a test using memory cells as described above can be performed by determining that the semiconductor memory device is defective, or by employing the redundancy repair scheme wherein the defective memory cell is replaced with a non-defective memory cell so that there are no physically-defective memory cells.
However, there are cases where a physically-defective memory cell is used as it is, and an error correction is performed on data including those from such a memory cell. Then, if there is a defective memory cell, data input from outside to the memory cell may possibly differ from the data after it is read out from the memory cell. Therefore, the encoder circuit and/or the decoder circuit may be determined defective even though they are operating normally. In other words, while a semiconductor memory device should be determined non-defective if normal data is output as a result of an error correction, it may be erroneously determined defective, thereby failing to properly perform a test.